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Which of the following is a disadvantage of a totem- pole output?


A) When switching from HIGH to LOW, Q4 is changing from saturation to cutoff. This transition takes longer than Q3's transition so for a short period a surge of current is drawn from Vcc.
B) When switching LOW to HIGH, Q3 is changing from saturation to cutoff. This transition takes longer than Q4's transition so for a short period a surge current is drawn from Vcc.
C) When switching from LOW to HIGH, Q4 is changing from saturation to cutoff. This transition takes longer than Q3's transition so for a short period a surge of current is drawn from Vcc.
D) Both A and C

E) All of the above
F) A) and B)

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When CMOS logic circuits are driving TTL logic circuits, any current mismatch problems can usually be overcome by the addition of:


A) a CMOS noninverting bilateral switch between the stages.
B) a TTL tri- state noninverting buffer between the stages.
C) a TTL tri- state inverting buffer between the stages.
D) a CMOS inverting bilateral switch between the stages.

E) A) and B)
F) None of the above

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When open collector outputs are wired together, the______ function is performed.


A) OR
B) AND
C) INVERSION
D) NAND

E) B) and D)
F) None of the above

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Exceeding the fan- out capability of a specific TTL series can cause:


A) IOL and IOH to exceed their maximum values, forcing VOL to exceed its maximum rated value and VOH to fall below its minimum rated value.
B) IOL and IOH to exceed their maximum values, forcing VOL to fall below its minimum rated value and VOH to exceed its maximum rated value.

C) A) and B)
D) undefined

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